Added ATCA channels 14/15

Signed-off-by: Bernardo Carvalho <bernardo.carvalho@tecnico.ulisboa.pt>
This commit is contained in:
2025-05-26 09:39:48 +00:00
parent 1c0df7c824
commit 2ce2e888ef
3 changed files with 77 additions and 116 deletions

View File

@@ -809,10 +809,13 @@ $IsttokApp = {
DataSource = "SignalsWriter" DataSource = "SignalsWriter"
Type = "float32" Type = "float32"
} }
AdcRawDecimOther = { AdcRawDecim14 = {
DataSource = "DDB1" DataSource = "SignalsWriter"
Type = "float32"
}
AdcRawDecim15 = {
DataSource = "SignalsWriter"
Type = "float32" Type = "float32"
NumberOfElements = 2
} }
AdcInteg0 = { AdcInteg0 = {
DataSource = "SignalsWriter" DataSource = "SignalsWriter"
@@ -870,10 +873,13 @@ $IsttokApp = {
DataSource = "SignalsWriter" DataSource = "SignalsWriter"
Type = "float32" Type = "float32"
} }
AdcIntegOther = { AdcInteg14 = {
DataSource = "DDB1" DataSource = "SignalsWriter"
Type = "float32"
}
AdcInteg15 = {
DataSource = "SignalsWriter"
Type = "float32" Type = "float32"
NumberOfElements = 2
} }
} }
} }
@@ -1105,33 +1111,29 @@ $IsttokApp = {
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
/* AdcRawDecim14 = {
AdcRawDecim12 = { NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_14.ADC_DECIM"
NodeName = "ATCAIOP1.ADC12RAW" DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_14.ADC_DECIM_D"
Period = "100e-6" Period = "100e-6"
MakeSegmentAfterNWrites = "200" MakeSegmentAfterNWrites = "200"
DecimatedNodeName = "ATCAIOP1.ADC12RAWD"
MinMaxResampleFactor = "100" MinMaxResampleFactor = "100"
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
AdcRawDecim13 = { AdcRawDecim15 = {
NodeName = "ATCAIOP1.ADC13RAW" NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_15.ADC_DECIM"
DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_15.ADC_DECIM_D"
Period = "100e-6" Period = "100e-6"
MakeSegmentAfterNWrites = "200" MakeSegmentAfterNWrites = "200"
DecimatedNodeName = "ATCAIOP1.ADC13RAWD"
MinMaxResampleFactor = "100" MinMaxResampleFactor = "100"
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
*/
AdcInteg0 = { AdcInteg0 = {
//NodeName = "ATCAIOP1.ADC0INT"
NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_0.ADC_INTEG" // node of the tree node NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_0.ADC_INTEG" // node of the tree node
Period = "100e-6" Period = "100e-6"
MakeSegmentAfterNWrites = "200" MakeSegmentAfterNWrites = "200"
DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_0.ADC_INTEG_D" // node of the tree node DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_0.ADC_INTEG_D" // node of the tree node
//DecimatedNodeName = "ATCAIOP1.ADC0INTD"
MinMaxResampleFactor = "100" MinMaxResampleFactor = "100"
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
@@ -1253,26 +1255,24 @@ $IsttokApp = {
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
/* AdcInteg14 = {
AdcInteg12 = { NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_14.ADC_INTEG"
NodeName = "ATCAIOP1.ADC12INT" DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_14.ADC_INTEG_D"
Period = "100e-6" Period = "100e-6"
MakeSegmentAfterNWrites = "200" MakeSegmentAfterNWrites = "200"
DecimatedNodeName = "ATCAIOP1.ADC12INTD"
MinMaxResampleFactor = "100" MinMaxResampleFactor = "100"
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
AdcInteg13 = { AdcInteg15 = {
NodeName = "ATCAIOP1.ADC13INT" NodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_15.ADC_INTEG"
DecimatedNodeName = "\TOP.HARDWARE.ATCA_2.IOP_9.CHANNEL_15.ADC_INTEG_D"
Period = "100e-6" Period = "100e-6"
MakeSegmentAfterNWrites = "200" MakeSegmentAfterNWrites = "200"
DecimatedNodeName = "ATCAIOP1.ADC13INTD"
MinMaxResampleFactor = "100" MinMaxResampleFactor = "100"
SamplePhase = "0" SamplePhase = "0"
AutomaticSegmentation = "0" AutomaticSegmentation = "0"
} }
*/
} }
} }
+EPICSCAOutput = { +EPICSCAOutput = {

View File

@@ -666,20 +666,16 @@ ErrorManagement::ErrorType AtcaIopADC::Execute(ExecutionInfo& info) {
//Sleep until the next period. Cannot be < 0 due to while(lastTimeTicks < startTicks) above //Sleep until the next period. Cannot be < 0 due to while(lastTimeTicks < startTicks) above
uint64 sleepTicksCorrection = (startTicks - lastTimeTicks); uint64 sleepTicksCorrection = (startTicks - lastTimeTicks);
//uint64 deltaTicks = sleepTimeTicks - (startTicks - lastTimeTicks);
uint64 deltaTicks = sleepTimeTicks - sleepTicksCorrection; uint64 deltaTicks = sleepTimeTicks - sleepTicksCorrection;
timeoutMax = deltaTicks; // debug timeoutMax = deltaTicks; // debug
//volatile int32 currentDMA = 0u;
oldestBufferIdx = GetOldestBufferIdx(); oldestBufferIdx = GetOldestBufferIdx();
float32 totalSleepTime = static_cast<float32>(static_cast<float64>(deltaTicks) * HighResolutionTimer::Period()); float32 totalSleepTime = static_cast<float32>(static_cast<float64>(deltaTicks) * HighResolutionTimer::Period());
if (sleepNature == Busy) { if (sleepNature == Busy) {
if (sleepPercentage > 0u) { if (sleepPercentage > 0u) {
//float32 sleepTime = totalSleepTime * 0.5;
float32 sleepTime = totalSleepTime * (static_cast<float32>(sleepPercentage) / 100.F); float32 sleepTime = totalSleepTime * (static_cast<float32>(sleepPercentage) / 100.F);
Sleep::NoMore(sleepTime); Sleep::NoMore(sleepTime);
//if(PollDmaBuff(startTicks + deltaTicks + 100000u) < 0)
} }
if(PollDmaBuff(deltaTicks + POLL_EXTRA_WAIT) < 0){ if(PollDmaBuff(deltaTicks + POLL_EXTRA_WAIT) < 0){
//pollTimout++; // TODO check max wait //pollTimout++; // TODO check max wait
@@ -702,20 +698,16 @@ ErrorManagement::ErrorType AtcaIopADC::Execute(ExecutionInfo& info) {
ErrorManagement::ErrorType err = synchSem.Post(); ErrorManagement::ErrorType err = synchSem.Post();
counterAndTimer[0] += nCycles; counterAndTimer[0] += nCycles;
//counterAndTimer[1] = mappedDmaBase[oldestBufferIdx * RT_PCKT_SIZE] * timerPeriodUsecTime;
counterAndTimer[1] = pdma[oldestBufferIdx].head_time_cnt * timerPeriodUsecTime; counterAndTimer[1] = pdma[oldestBufferIdx].head_time_cnt * timerPeriodUsecTime;
// Get adc data from DMA packet // Get adc data from DMA packet
uint32 k; uint32 k;
uint32 s; uint32 s;
for (k=0u; k < ATCA_IOP_N_ADCs ; k++) { for (k=0u; k < ATCA_IOP_N_ADCs ; k++) {
//adcValues[k] = (mappedDmaBase[oldestBufferIdx * RT_PCKT_SIZE + //adcValues[k] = pdma[oldestBufferIdx].adc_decim_data[k] / (1<<14);
// IOP_ADC_OFFSET + k] ) / (1<<14); adcValues[k] = pdma[oldestBufferIdx].adc_decim_data[k];
adcValues[k] = pdma[oldestBufferIdx].adc_decim_data[k] / (1<<14);
} }
//int64 * mappedDmaBase64 = (int64 *) mappedDmaBase;
for (k=0u; k < ATCA_IOP_N_INTEGRALS ; k++) { for (k=0u; k < ATCA_IOP_N_INTEGRALS ; k++) {
adcIntegralValues[k] = pdma[oldestBufferIdx].adc_integ_data[k]; adcIntegralValues[k] = pdma[oldestBufferIdx].adc_integ_data[k];
//mappedDmaBase64[oldestBufferIdx * RT_PCKT64_SIZE + IOP_ADC_INTEG_OFFSET + k];
} }
float64 t = counterAndTimer[1]; float64 t = counterAndTimer[1];

View File

@@ -68,88 +68,57 @@ namespace MARTe {
* <pre> * <pre>
* +AtcaIopADC = { * +AtcaIopADC = {
* Class = "AtcaIop::AtcaIopADC" * Class = "AtcaIop::AtcaIopADC"
CPUMask = "0x040" * CPUMask = "0x040"
StackSize = "1048576" * StackSize = "1048576"
DeviceName = "/dev/atca_v6" * DeviceName = "/dev/atca_v6"
BoardId = 9 * BoardId = 9
DeviceDmaName = "/dev/atca_v6_dmart_2" * DeviceDmaName = "/dev/atca_v6_dmart_2"
NumberOfChannels = "12" * NumberOfChannels = "12"
IsMaster = "1" * IsMaster = "1"
SleepNature = "Busy" * SleepNature = "Busy"
SleepPercentage = "15" * SleepPercentage = "15"
ADCFrequency = "2000000" * ADCFrequency = "2000000"
RTDecimation = "200" * RTDecimation = "200"
ChopperPeriod = "2000" * ChopperPeriod = "2000"
ElectricalOffsets = {"-151" "110" "-417" "-35" "-204" "0" "134" "-59" "-227" "-308" "-120" "-175" "0" "0" "0" "0"} * ElectricalOffsets = {"-151" "110" "-417" "-35" "-204" "0" "134" "-59" "-227" "-308" "-120" "-175" "0" "0" "0" "0"}
WiringOffsets = {"0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0"} * WiringOffsets = {"0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0" "0.0"}
//WiringOffsets = {0.354 0.288 -0.010 -0.083 0.347 0.228 0.088 0.186 -0.297 -0.101 0.025 -0.012 0.0 0.0 0.0 0.0} * //WiringOffsets = {0.354 0.288 -0.010 -0.083 0.347 0.228 0.088 0.186 -0.297 -0.101 0.025 -0.012 0.0 0.0 0.0 0.0}
//WiringOffsets = {"0.271" "0.211" "0.098" "0.141" "0.312" "0.203" "0.212" "0.361" "-0.546" "-0.433" "-0.598" "1.362"} * //WiringOffsets = {"0.271" "0.211" "0.098" "0.141" "0.312" "0.203" "0.212" "0.361" "-0.546" "-0.433" "-0.598" "1.362"}
Signals = { * Signals = {
Counter = { * Counter = {
Type = "uint32" * Type = "uint32"
} * }
Time = { * Time = {
Type = "uint32" * Type = "uint32"
} * }
TimeoutCount = { * TimeoutCount = {
Type = "uint32" * Type = "uint32"
} * }
TimeoutMax = { * TimeoutMax = {
Type = "uint32" * Type = "uint32"
} * }
ADC0Decim = { * ADCDecim = {
Type = "int32" * DataSource = "AtcaIopAdc_DS"
} * Type = "int32"
ADC1Decim = { * NumberOfElements = 16
Type = "int32" * NumberOfDimensions = 1
} * }
* ADCInt = {
* Class = ADCSimulator * DataSource = "AtcaIopAdc_DS"
* DeviceName = "/dev/atca_v6" //Mandatory * Type = "int64"
* BoardId = 0 // Mandatory * NumberOfElements = 16
* ChopperPeriod = 2000 * NumberOfDimensions = 1
* ElectricalOffsets = {1, 10, 20, -30, 1, 1, -10, 10} * }
* WiringOffsets = {1, 10, 20, -30, 1, 1, -10, 10} * Idle_Thread1_CycleTime = {
* ADCFrequency = 2000000 * DataSource = "Timings"
* Signals = { * Alias = "Idle.Thread1_CycleTime"
* Counter = { * Type = "uint32"
* Type = uint32 * }
* } * Run_Thread1_CycleTime = {
* Time = { * DataSource = "Timings"
* Type = uint32 * Alias = "Online.Thread1_CycleTime"
* Frequency = 1000 * Type = "uint32"
* } * }
* TimeoutCount = {
* Type = uint32
* }
* TimeoutMax = {
* Type = uint32
* }
* ADC0 = {
* Type = uint32
* }
* ADC1 = {
* Type = uint32
* }
* ADC2 = {
* Type = uint32
* }
* ADC3 = {
* Type = uint32
* }
* ADC0Decim = {
* Type = uint32
* }
* ADC1Decim = {
* Type = uint32
* }
* ADC2Decim = {
* Type = uint32
* }
* ...
* ADC7Decim = {
* Type = uint32
* }
* } * }
* } * }
* </pre> * </pre>