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Sakbe
2019-10-21 16:02:55 +01:00
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epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/ATCAadcDrv.cpp Normal file
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//******************************************************************************
// MARTe Library
// $Log: ATCAadcDrv.cpp,v $
// Revision 1.48 2010/02/09 14:50:59 ppcc_dev
// Significantly increased the PollSleepTimeWakeBeforeUs in order to disallow any
// sleeping in online...
//
// Revision 1.47 2010/01/22 09:29:07 aneto
// pollSleepTimeWakeBeforeUs was only being converted to us if not specified
//
// Revision 1.46 2009/12/15 12:16:51 aneto
// Code cleaning
//
// Revision 1.45 2009/12/03 14:52:13 ppcc_dev
// Sleeps, if time is available, before start busy polling.
// The time to sleep is given by the remaining time until the start of
// the next pulse minus the worst jitter from a sleep and minus the
// desired time, before the beginning of the next pulse, that we want to start
// busy polling.
// The worst jitter decays to zero in order to try to maintain a good performance
//
// Revision 1.44 2009/09/23 12:21:20 aneto
// Cast the header to unsigned int 32 in order to avoid rollover problems
// when it changes the bit sign
//
// Revision 1.43 2009/08/07 09:31:47 aneto
// Allow the autoSoftwareTrigger to work even if the softwareTrigger flag
// is set to false
//
// Revision 1.42 2009/06/23 13:44:19 aneto
// In Linux wait sometime between header synchronisation
//
// Revision 1.41 2009/06/09 09:55:28 ppcc_dev
// Time is read directly from the board header
//
// Revision 1.40 2009/05/21 15:18:34 ppcc_dev
// DigIO does not have outputMap
//
// Revision 1.39 2009/04/21 08:48:42 aneto
// Channel statistics variable weren't being initialised
//
// Revision 1.38 2009/04/14 09:06:10 aneto
// Allow the system to auto-trigger after a specified amount of time
//
// Revision 1.37 2009/04/03 10:02:03 aneto
// lastCycleUsecTime now is true 64 bits.
// This uses the information from the headers to increment an internal counter
//
// Revision 1.36 2009/04/01 15:10:36 aneto
// Bug in the way the modulus was being calculated for the usec time. The bug was in converting from 64 to 32 bits of lastCycleUsecTime
//
// Revision 1.35 2009/03/31 08:11:37 aneto
// Support for multiple input
//
// Revision 1.34 2009/03/26 15:13:21 aneto
// Automatic offset compensation
//
// Revision 1.33 2009/03/16 11:42:16 aneto
// Corrected the polling mode in order to allow different acquisition frequencies
//
// Revision 1.32 2009/03/11 12:31:54 aneto
// Support an html output with information about the driver
//
// Revision 1.31 2009/01/26 17:26:20 ppcc_dev
// Small bugs solved
//
// Revision 1.30 2009/01/26 09:23:51 aneto
// Removed printfs
//
// Revision 1.29 2009/01/26 09:20:38 aneto
// linux support
//
// Revision 1.28 2009/01/22 13:59:18 aneto
// Miror clean up
//
// Revision 1.27 2008/11/28 12:03:13 aneto
// Added bufferNumber
//
// Revision 1.26 2008/11/21 14:16:42 ppcc_dev
// This version works with the new firmware: jet clock+trigger
//
// Revision 1.24 2008/09/30 11:24:49 rvitelli
// Added non-synchronous operating mode.
//
// Revision 1.23 2008/09/30 10:36:03 ppcc_dev
// Minor modifications to both driver and low level module
//
// Revision 1.22 2008/09/16 13:06:57 fpiccolo
// Modified SleepMsec to SleepNoMore to remove jitter on cycle time
//
// Revision 1.21 2008/09/15 16:51:45 ppcc_dev
// Solved few bugs
//
// Revision 1.20 2008/09/09 11:10:36 fpiccolo
// Patch to make it work only with two modules and old firmware
//
// Revision 1.19 2008/09/09 09:29:15 fpiccolo
// Modified driver structure.
// Added SingleATCAModule class
// Added Writing facilities
//
// Revision 1.18 2008/09/04 11:48:52 ppcc_dev
// Minor modifications to the GETData function.
// Removed DisableAcquisition call from the ObjectLoadSetup function
// since was causing a crash.
//
// Revision 1.17 2008/08/19 12:43:29 ppcc_dev
// Corrected memory addresses in memcpy, added simulation code for SoftTrigger
//
// Revision 1.16 2008/08/15 10:41:35 fpiccolo
// Minor stylish modifications.
// Added TimeModule Interface
//
// Revision 1.15 2008/08/01 14:09:26 rvitelli
// First working version
//
// Revision 1.14 2008/07/28 13:50:05 aneto
// Added support for multiple boards.
//
//******************************************************************************
#include "ATCAadcDrv.h"
#include "ConfigurationDataBase.h"
#include "CDBExtended.h"
#include "HRT.h"
#include "Sleep.h"
#include "Console.h"
int32 SingleATCAModule::currentDMABufferIndex = 0;
int32 SingleATCAModule::currentMasterHeader = 0;
#ifdef _LINUX
int32 ATCAadcDrv::pageSize = 0;
int32 ATCAadcDrv::fileDescriptor = 0;
#endif
SingleATCAModule::SingleATCAModule(){
moduleIdentifier = 0;
numberOfAnalogueInputChannels = 0;
numberOfDigitalInputChannels = 0;
numberOfAnalogueOutputChannels = 0;
numberOfDigitalOutputChannels = 0;
int i = 0;
for(i = 0; i < 8; i++)outputMap[i] = 0;
// Input Section //
isMaster = False;
for(i = 0; i < 4; i++)dmaBuffers[i] = NULL;
nextExpectedAcquisitionCPUTicks = 0;
boardInternalCycleTicks = 0;
datagramArrivalFastMonitorSecSleep = 0.0;
boardInternalCycleTime = 0;
lastCycleUsecTime = 0;
packetCounter = 0;
synchronizing = False;
channelStatistics = NULL;
allowPollSleeping = True;
worstPollSleepJitter = 0;
worstPollSleepJitterDecayRate = (1 - 5e-6);
pollSleepTime = 0;
pollSleepTimeWakeBeforeUs = 20;
}
bool SingleATCAModule::ObjectLoadSetup(ConfigurationDataBase &info,StreamInterface *err){
CDBExtended cdb(info);
FString moduleName;
cdb->NodeName(moduleName);
if(!cdb.ReadInt32(moduleIdentifier, "ModuleIdentifier")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: ModuleIdentifier has not been specified.");
return False;
}
int32 master = 0;
cdb.ReadInt32(master, "IsMaster",0);
isMaster = (master != 0);
if(isMaster){
CStaticAssertErrorCondition(Information,"SingleATCAModule::ObjectLoadSetup: Module with identifier %d has been specified as master.", moduleIdentifier);
}
synchronizing = False;
if (isMaster) {
FString syncMethod;
if(!cdb.ReadFString(syncMethod, "SynchronizationMethod")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: SynchronizationMethod has not been specified.");
return False;
}
if (syncMethod == "GetLatest") {
synchronizing = False;
CStaticAssertErrorCondition(Information,"SingleATCAModule::ObjectLoadSetup: synchronization method: GetLatest");
} else {
synchronizing = True;
CStaticAssertErrorCondition(Information,"SingleATCAModule::ObjectLoadSetup: synchronization method: Synchronous on input");
}
}
if(!cdb.ReadInt32(numberOfAnalogueInputChannels, "NumberOfAnalogueInput")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfAnalogueInput has not been specified.");
return False;
}
if(!cdb.ReadInt32(numberOfDigitalInputChannels, "NumberOfDigitalInput")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfDigitalInput has not been specified.");
return False;
}
if(!cdb.ReadInt32(numberOfAnalogueOutputChannels, "NumberOfAnalogueOutput")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfAnalogueOutput has not been specified.");
return False;
}
if(!cdb.ReadInt32(numberOfDigitalOutputChannels, "NumberOfDigitalOutput")){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfDigitalOutput has not been specified.");
return False;
}
int32 detectedNumberOfInputAnalogChannels = 0;
#ifdef _RTAI
detectedNumberOfInputAnalogChannels = GetNumberOfInputAnalogChannels(moduleIdentifier);
#elif defined(_LINUX)
int32 temp = moduleIdentifier;
int32 ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_N_IN_ANA_CHANNELS, &temp);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query number of analog input channels. ioctl returned : %d", ret);
return False;
}
detectedNumberOfInputAnalogChannels = temp;
#endif
if(numberOfAnalogueInputChannels > detectedNumberOfInputAnalogChannels){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfAnalogueInputs is at most %d. Specified %d.", detectedNumberOfInputAnalogChannels, numberOfAnalogueInputChannels);
return False;
}
int32 detectedNumberOfInputDigitalChannels = 0;
#ifdef _RTAI
detectedNumberOfInputDigitalChannels = GetNumberOfInputDigitalChannels(moduleIdentifier);
#elif defined(_LINUX)
temp = moduleIdentifier;
ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_N_IN_DIG_CHANNELS, &temp);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query number of digital input channels. ioctl returned : %d", ret);
return False;
}
detectedNumberOfInputDigitalChannels = temp;
#endif
if(numberOfDigitalInputChannels > detectedNumberOfInputDigitalChannels){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfDigitalInputs is at most %d. Specified %d.", detectedNumberOfInputDigitalChannels, numberOfDigitalInputChannels);
return False;
}
int32 detectedNumberOfOutputAnalogChannels = 0;
#ifdef _RTAI
detectedNumberOfOutputAnalogChannels = GetNumberOfAnalogueOutputChannels(moduleIdentifier);
#elif defined(_LINUX)
temp = moduleIdentifier;
ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_N_OUT_ANA_CHANNELS, &temp);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query number of analog output channels. ioctl returned : %d", ret);
return False;
}
detectedNumberOfOutputAnalogChannels = temp;
#endif
if(numberOfAnalogueOutputChannels > detectedNumberOfOutputAnalogChannels){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfAnalogueOutputs is at most %d. Specified %d.", detectedNumberOfOutputAnalogChannels, numberOfAnalogueOutputChannels);
return False;
}
int32 detectedNumberOfDigitalOutputChannels = 0;
#ifdef _RTAI
detectedNumberOfDigitalOutputChannels = GetNumberOfDigitalOutputChannels(moduleIdentifier);
#elif defined(_LINUX)
temp = moduleIdentifier;
ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_N_OUT_DIG_CHANNELS, &temp);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query number of digital output channels. ioctl returned : %d", ret);
return False;
}
detectedNumberOfDigitalOutputChannels = temp;
#endif
if(numberOfDigitalOutputChannels > detectedNumberOfDigitalOutputChannels){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: NumberOfAnalogueOutputs is at most %d. Specified %d.", detectedNumberOfDigitalOutputChannels, numberOfAnalogueOutputChannels);
return False;
}
if(numberOfAnalogueOutputChannels > 0){
bool hasRTM = False;
#ifdef _RTAI
hasRTM = IsRTMPresent(moduleIdentifier);
#elif defined(_LINUX)
int rtm = moduleIdentifier;
ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_IS_RTM_PRESENT, &rtm);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query IsRTMPresent. ioctl returned : %d", ret);
return False;
}
hasRTM = (rtm == 1);
#endif
if(!hasRTM){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: Module %d specifies %d outputs but does not have RTM module", moduleIdentifier, numberOfAnalogueOutputChannels);
return False;
}
int dims = 1;
int size[2] = {numberOfAnalogueOutputChannels,1};
if(!cdb.ReadInt32Array(outputMap, size, dims, "OutputMap")){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: OutputMap not specified. Assuming sequential order.");
for(int i = 0; i < numberOfAnalogueOutputChannels; i++)
outputMap[i] = i+1;
}
// output order starts from 0 for convenience.
for(int i = 0; i < numberOfAnalogueOutputChannels; i++) outputMap[i]--;
}
if(channelStatistics != NULL){
delete[] channelStatistics;
channelStatistics = NULL;
}
channelStatistics = new StatSignalInfo[NumberOfInputChannels()];
if(channelStatistics == NULL){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not create ChannelStatistics for %d channels", NumberOfInputChannels());
return False;
}
for(int i=0; i<NumberOfInputChannels(); i++){
channelStatistics[i].Init();
channelStatistics[i].decayRate = 0.999;
}
if(isMaster){
if(!cdb.ReadInt32(boardInternalCycleTime, "BoardInternalCycleTime",50)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: BoardInternalCycleTime has not been specified. Assuming %d usec triggering period", boardInternalCycleTime);
}
boardInternalCycleTicks = (int64)(boardInternalCycleTime * 1e-6 * HRT::HRTFrequency());
int32 temp = 0;
if(!cdb.ReadInt32(temp, "DatagramMonitoringFastSleep",2)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: DataArrivalUsecSleep has not been specified. Assuming %d usec sleeping time.", temp);
}
datagramArrivalFastMonitorSecSleep = temp*1e-6;
if(!cdb.ReadInt32(temp, "DataAcquisitionUsecTimeOut",1000)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: DataAcquisitionUsecTimeOut has not been specified. Assuming %d usec of timeout.", temp);
}
double deltaT = temp*1e-6;
dataAcquisitionUsecTimeOut = (int64)(deltaT*HRT::HRTFrequency());
if(!cdb.ReadInt32(temp, "AllowPollSleeping", 1)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: AllowPollSleeping has not been specified. Assuming %d ", allowPollSleeping);
}
allowPollSleeping = (temp == 1);
if(!cdb.ReadFloat(worstPollSleepJitterDecayRate, "WorstPollSleepJitterDecayRate", 5e-6)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: WorstPollSleepJitterDecayRate has not been specified. Assuming %f ", worstPollSleepJitterDecayRate);
}
worstPollSleepJitterDecayRate = 1 - worstPollSleepJitterDecayRate;
if(!cdb.ReadFloat(pollSleepTimeWakeBeforeUs, "PollSleepTimeWakeBeforeUs", 20)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: PollSleepTimeWakeBeforeUs has not been specified. Assuming %f ", pollSleepTimeWakeBeforeUs);
}
pollSleepTimeWakeBeforeUs *= 1e-6;
}
return True;
}
/** Copies the pointers to the DMA Buffers */
#ifdef _LINUX
bool SingleATCAModule::InstallDMABuffers(int32 *mappedDmaMemoryLocation){
int32 boardSlotNums[12];
int32 boardIdx = 0;
int ret = ioctl(ATCAadcDrv::fileDescriptor, PCIE_ATCA_ADC_IOCT_GET_BOARD_SLOT_NS, boardSlotNums);
if(ret != 0){
CStaticAssertErrorCondition(InitialisationError,"SingleATCAModule::ObjectLoadSetup: Could not query the number of boards. ioctl returned : %d",ret);
return False;
}
for(boardIdx = 0; boardIdx < 12; boardIdx++){
if(boardSlotNums[boardIdx] == moduleIdentifier){
break;
}
}
int32 pageInc = ATCAadcDrv::pageSize / sizeof(int32);
for(int32 i = 0; i < DMA_BUFFS; i++){
dmaBuffers[i] = mappedDmaMemoryLocation + pageInc * (DMA_BUFFS * boardIdx + i);
CStaticAssertErrorCondition(Information,"SingleATCAModule::InstallDMABuffers: DMABuffer[%d] %p ",i, dmaBuffers[i]);
}
CStaticAssertErrorCondition(Information,"SingleATCAModule::InstallDMABuffers: dmaBuffers: %p %p %p %p", dmaBuffers[0], dmaBuffers[1], dmaBuffers[2], dmaBuffers[3]);
return True;
}
#else
/** Copies the pointers to the DMA Buffers */
bool SingleATCAModule::InstallDMABuffers(){
int *boardDMABufferPointers = GetBoardBufferAddress(moduleIdentifier);
if(boardDMABufferPointers == NULL) return False;
for(int32 i = 0; i < DMA_BUFFS; i++){
dmaBuffers[i] = (int32 *)boardDMABufferPointers[i];
CStaticAssertErrorCondition(Information,"SingleATCAModule::InstallDMABuffers: DMABuffer[%d] %p ",i, dmaBuffers[i]);
}
CStaticAssertErrorCondition(Information,"SingleATCAModule::InstallDMABuffers: dmaBuffers: %p %p %p %p", dmaBuffers[0], dmaBuffers[1], dmaBuffers[2], dmaBuffers[3]);
return True;
}
#endif
int32 SingleATCAModule::GetLatestBufferIndex(){
uint32 *latestBufferHeader = (uint32 *)dmaBuffers[0];
uint32 latestBufferIndex = 0;
// check which one is the oldest buffer
for (int dmaIndex = 1; dmaIndex < DMA_BUFFS; dmaIndex++) {
// Pointer to the header
uint32 *header = (uint32 *)dmaBuffers[dmaIndex];
//uint32 *footer = header + NumberOfInputChannels() + HEADER_LENGTH;
if ((*header > *latestBufferHeader)) {
latestBufferHeader = header;
latestBufferIndex = dmaIndex;
}
}
return latestBufferIndex;
}
int32 SingleATCAModule::CurrentBufferIndex(){
uint32 *oldestBufferHeader = (uint32 *)dmaBuffers[0];
uint32 oldestBufferIndex = 0;
int64 stopAcquisition = HRT::HRTCounter() + dataAcquisitionUsecTimeOut;
// check which one is the oldest buffer
int dmaIndex = 0;
for (dmaIndex = 1; dmaIndex < DMA_BUFFS; dmaIndex++) {
// Pointer to the header
uint32 *header = (uint32 *)dmaBuffers[dmaIndex];
if (*header < *oldestBufferHeader) {
oldestBufferHeader = header;
oldestBufferIndex = dmaIndex;
}
}
uint32 *oldestBufferFooter = oldestBufferHeader + NumberOfInputChannels() + HEADER_LENGTH;
uint32 oldestTimeMark = *oldestBufferFooter;
// If the data transfer is not in progress it means that the new data will
// be stored in the oldest buffer.
int64 actualTime = HRT::HRTCounter();
while (oldestTimeMark == *oldestBufferFooter) {
if(actualTime > stopAcquisition) {
return -1;
}
actualTime = HRT::HRTCounter();
}
if(*oldestBufferHeader == *oldestBufferFooter) return oldestBufferIndex;
return -2;
}
bool SingleATCAModule::WriteData(const int32 *&buffer){
for(int i = 0; i < numberOfAnalogueOutputChannels; i++){
#ifdef _LINUX
int32 toWrite[4];
toWrite[0] = moduleIdentifier;
toWrite[1] = outputMap[i];
toWrite[2] = *buffer++;
toWrite[3] = 0;
write(ATCAadcDrv::fileDescriptor, toWrite, 4 * sizeof(int32));
#else
WriteToDAC(moduleIdentifier, outputMap[i], *buffer++);
#endif
}
for(int i = 0; i < numberOfDigitalOutputChannels; i++){
#ifdef _LINUX
int32 toWrite[4];
toWrite[0] = moduleIdentifier;
toWrite[1] = 0;
toWrite[2] = *buffer++;
toWrite[3] = 1;
if(write(ATCAadcDrv::fileDescriptor, toWrite, 4 * sizeof(int32)) < 0){
CStaticAssertErrorCondition(FatalError,"SingleATCAModule::WriteData: Could not write the value : %d to module %d", toWrite[2], toWrite[0]);
return False;
}
#else
WriteToDIO(moduleIdentifier, 0, *buffer++);
#endif
}
return True;
}
bool SingleATCAModule::Poll(){
#ifdef _LINUX
static int firstTime = 1;
if(firstTime == 1){
SleepSec(1e-3);
firstTime = 0;
}
#endif
if(isMaster){
if (synchronizing) {
if(allowPollSleeping) {
//Allow the worstPollSleepJitter to decay -> 0
worstPollSleepJitter *= worstPollSleepJitterDecayRate;
int64 tStart = HRT::HRTCounter();
pollSleepTime = (nextExpectedAcquisitionCPUTicks - tStart) * HRT::HRTPeriod() - pollSleepTimeWakeBeforeUs - worstPollSleepJitter;
if(pollSleepTime > 0){
SleepNoMore(pollSleepTime);
float jitter = ((HRT::HRTCounter() - tStart) * HRT::HRTPeriod()) - pollSleepTime;
if(jitter < 0) jitter = -jitter;
if(jitter > worstPollSleepJitter){
worstPollSleepJitter = jitter;
}
}
}
int32 previousAcquisitionIndex = currentDMABufferIndex;
int32 currentDMA = CurrentBufferIndex();
if(currentDMA < 0){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::GetData: Returned -1");
return False;
}
currentDMABufferIndex = currentDMA;
// Update NextExecTime with a guess
nextExpectedAcquisitionCPUTicks = HRT::HRTCounter() + boardInternalCycleTicks;
int deltaBuffer = *dmaBuffers[currentDMABufferIndex] - *dmaBuffers[previousAcquisitionIndex];
int nOfLostPackets = deltaBuffer - boardInternalCycleTime;
if( *dmaBuffers[currentDMABufferIndex] == 0){
printf("dmaBuffers[currentDMABufferIndex]: %d, *dmaBuffers[previousAcquisitionIndex = %d\n", *dmaBuffers[currentDMABufferIndex], *dmaBuffers[previousAcquisitionIndex]);
}
if (( nOfLostPackets > 0)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::GetData: Lost %d Packets", nOfLostPackets / boardInternalCycleTime);
CStaticAssertErrorCondition(Warning,"SingleATCAModule::GetData: boardInternalCycleTime %d, deltaBuffer: %d", boardInternalCycleTime, deltaBuffer);
}
currentMasterHeader = *(dmaBuffers[currentDMABufferIndex]);
lastCycleUsecTime = (uint32)currentMasterHeader;
}
return True;
}
return False;
}
bool SingleATCAModule::GetData(int32 *&buffer){
/** Perform synchronisation */
if(isMaster){
if (synchronizing) {
buffer[0] = *dmaBuffers[currentDMABufferIndex];
buffer[1] = buffer[0];
// Skip the packet sample number and sample time
buffer += 2;
currentMasterHeader = *(dmaBuffers[currentDMABufferIndex]);
lastCycleUsecTime = (uint32)currentMasterHeader;
} else {
currentDMABufferIndex = GetLatestBufferIndex();
}
}else{
int32 *header = dmaBuffers[currentDMABufferIndex];
int32 *footer = header + NumberOfInputChannels() + HEADER_LENGTH;
if(*header != currentMasterHeader){
CStaticAssertErrorCondition(FatalError, "SingleATCAModule (slot=%d)::GetData: h (=%d) different from master h(=%d)", moduleIdentifier, *header, currentMasterHeader);
return False;
}
if(*header != *footer){
CStaticAssertErrorCondition(FatalError, "SingleATCAModule (slot=%d)::GetData: The header (=%d) is different from the footer(=%d)", moduleIdentifier, *header, *footer);
return False;
}
}
// Skip the Header in the DMA Buffer
int32 *src = (int32 *)dmaBuffers[currentDMABufferIndex] + 1;
int32 *dest = buffer;
memcpy(dest, src, NumberOfInputChannels()*sizeof(int32));
//This is introducing a huge delay (~1.5us per board). To be solved.
/*for(int i=0; i<NumberOfInputChannels(); i++){
channelStatistics[i].Update((float)(buffer[i] * 1.49e-8));
}*/
buffer += NumberOfInputChannels();
return True;
}
bool SingleATCAModule::ProcessHttpMessage(HttpStream &hStream) {
hStream.Printf("<table class=\"bltable\">\n");
hStream.Printf("<tr>\n");
hStream.Printf("<td>Module Identifier</td><td>%d</td>\n", moduleIdentifier);
hStream.Printf("</tr>\n");
hStream.Printf("<tr>\n");
hStream.Printf("<td>Master</td><td>%s</td>\n", isMaster ? "True" : "False");
hStream.Printf("</tr>\n");
hStream.Printf("</table>\n");
hStream.Printf("<table class=\"bltable\">\n");
hStream.Printf("<tr><th>Channel</th><th>Last</th><th>Mean</th><th>Variance</th><th>Abs Max</th><th>Abs Min</th><th>Rel Max</th><th>Rel Min</th></tr>\n");
int i=0;
for(i=0; i<NumberOfInputChannels(); i++){
hStream.Printf("<tr><td>%d</td><td>%.3e</td><td>%.3e</td><td>%.3e</td><td>%.3e</td><td>%.3e</td><td>%.3e</td><td>%.3e</td></tr>\n", i + 1, channelStatistics[i].LastValue(), channelStatistics[i].Mean(10), channelStatistics[i].Variance(10), channelStatistics[i].AbsMax(), channelStatistics[i].AbsMin(), channelStatistics[i].RelMax(), channelStatistics[i].RelMin());
}
hStream.Printf("</table>");
return True;
}
bool SingleATCAModule::ResetStatistics(){
int i=0;
for(i=0; i<NumberOfInputChannels(); i++){
channelStatistics[i].Init();
}
return True;
}
ATCAadcDrv::ATCAadcDrv(){
numberOfBoards = 0;
lastCycleUsecTime = 0;
modules = NULL;
synchronizing = False;
softwareTrigger = 0;
masterBoardIdx = -1;
autoSoftwareTriggerAfterUs = -1;
autoSoftwareTrigger = False;
#ifdef _LINUX
fileDescriptor = 0;
pageSize = sysconf(_SC_PAGE_SIZE);
#endif
css = "table.bltable {"
"margin: 1em 1em 1em 2em;"
"background: whitesmoke;"
"border-collapse: collapse;"
"}"
"table.bltable th, table.bltable td {"
"border: 1px silver solid;"
"padding: 0.2em;"
"}"
"table.bltable th {"
"background: gainsboro;"
"text-align: left;"
"}"
"table.bltable caption {"
"margin-left: inherit;"
"margin-right: inherit;"
"}";
}
bool ATCAadcDrv::EnableAcquisition(){
if(modules == NULL) return False;
#ifdef _RTAI
return (EnableATCApcieAcquisition() == 0);
#elif defined(_LINUX)
int ret = ioctl(fileDescriptor, PCIE_ATCA_ADC_IOCT_ACQ_ENABLE);
if(ret != 0){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Could not enable acquisition. ioctl returned : %d",Name(), ret);
return False;
}
#endif
return True;
}
bool ATCAadcDrv::DisableAcquisition(){
if(modules == NULL) return False;
#ifdef _RTAI
return (DisableATCApcieAcquisition() == 0);
#elif defined(_LINUX)
int ret = ioctl(fileDescriptor, PCIE_ATCA_ADC_IOCT_ACQ_DISABLE);
if(ret != 0){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Could not disable acquisition. ioctl returned : %d",Name(), ret);
return False;
}
#endif
return True;
}
bool ATCAadcDrv::ObjectLoadSetup(ConfigurationDataBase &info,StreamInterface *err){
#ifdef _LINUX
fileDescriptor = open("/dev/pcieATCAAdc0", O_RDWR);
if(fileDescriptor < 1){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Could not open device driver at: %s",Name(), "/dev/pcieATCAAdc0");
return False;
}
#endif
DisableAcquisition();
CDBExtended cdb(info);
if(!cdb.ReadInt32(softwareTrigger, "UseSoftwareTrigger",0)){
CStaticAssertErrorCondition(Warning,"SingleATCAModule::ObjectLoadSetup: UseSoftwareTrigger has not been specified. Assuming hardware trigger");
}
if(!GenericAcqModule::ObjectLoadSetup(cdb,err)){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: GenericAcqModule::ObjectLoadSetup failed",Name());
return False;
}
FString syncMethod;
if(!cdb.ReadFString(syncMethod, "SynchronizationMethod")){
CStaticAssertErrorCondition(InitialisationError,"ATCAAdcDrv::ObjectLoadSetup: SynchronizationMethod has not been specified.");
return False;
}
if (syncMethod == "GetLatest") synchronizing = False;
else synchronizing = True;
cdb.ReadInt32(autoSoftwareTriggerAfterUs, "AutoSoftwareTriggerAfterUs", -1);
autoSoftwareTrigger = (autoSoftwareTriggerAfterUs > 0);
if(autoSoftwareTrigger){
CStaticAssertErrorCondition(Information, "ATCAadcDrv::ObjectLoadSetup: %s the system will be automatically triggered after %d us", Name(), autoSoftwareTriggerAfterUs);
}
// Get buffer address from the driver exported function GetBufferAddress (only works in RTAI!)
#ifdef _RTAI
numberOfBoards = GetNumberOfBoards();
#elif defined(_LINUX)
int ret = ioctl(fileDescriptor, PCIE_ATCA_ADC_IOCT_NUM_BOARDS, &numberOfBoards);
if(ret != 0){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Could not query the number of boards. ioctl returned : %d",Name(), ret);
return False;
}
mappedDmaMemorySize = numberOfBoards * DMA_BUFFS * pageSize;
mappedDmaMemoryLocation = (int32 *)mmap(0, mappedDmaMemorySize, PROT_READ, MAP_FILE | MAP_SHARED | MAP_LOCKED | MAP_POPULATE | MAP_NONBLOCK, fileDescriptor, 0);
if(mappedDmaMemoryLocation == MAP_FAILED) {
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: MAP_FAILED",Name());
return False;
}
#else
numberOfBoards = -1;
#endif
if(!cdb->Move( "Modules")){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: No Module has been specified",Name());
return False;
}
int32 nOfATCAModules = cdb->NumberOfChildren();
if(nOfATCAModules!= numberOfBoards){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Number of installed boards [%d] differs from the number of specified boards [%d].",Name(),numberOfBoards,nOfATCAModules);
return False;
}
if(modules != NULL) delete[] modules;
modules = new SingleATCAModule[nOfATCAModules];
if(modules == NULL){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Failed allocating space for %d modules.",Name(),nOfATCAModules);
return False;
}
masterBoardIdx = -1;
for(int i = 0; i < nOfATCAModules; i++){
cdb->MoveToChildren(i);
cdb.WriteFString(syncMethod,"SynchronizationMethod");
if(!modules[i].ObjectLoadSetup(cdb,err)){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Failed initialising module %d.",Name(),i);
delete[] modules;
return False;
}
if(modules[i].isMaster){
if(masterBoardIdx == -1){
masterBoardIdx = i;
}else{
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Failed initialising module %d. A master board was already specified at index: %d",Name(),i,masterBoardIdx);
return False;
}
}
cdb->MoveToFather();
}
for(int i = 0; i < nOfATCAModules; i++){
#ifdef _LINUX
if(!modules[i].InstallDMABuffers(mappedDmaMemoryLocation)){
#else
if(!modules[i].InstallDMABuffers()){
#endif
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Board %d failed to initialise DMA buffers",Name(), i);
return False;
}
}
cdb->MoveToFather();
int32 extTriggerAndClock = 0;
if(!cdb.ReadInt32(extTriggerAndClock, "ExtTriggerAndClock",1)){
AssertErrorCondition(Warning,"ATCAadcDrv::ObjectLoadSetup: %s: ExtTriggerAndClock not specified, using default = %d",Name(), extTriggerAndClock);
}
#ifdef _LINUX
ret = ioctl(fileDescriptor, PCIE_ATCA_ADC_IOCT_SET_EXT_CLK_TRG, &extTriggerAndClock);
if(ret != 0){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::ObjectLoadSetup: %s: Could not SetATCApcieExternalTriggerAndClock. ioctl returned : %d",Name(), ret);
return False;
}
#else
SetATCApcieExternalTriggerAndClock(extTriggerAndClock);
#endif
// Setup OK
AssertErrorCondition(Information,"ATCAadcDrv::ObjectLoadSetup: %s: initialized correctly ",Name());
EnableAcquisition();
return True;
}
bool ATCAadcDrv::ObjectDescription(StreamInterface &s,bool full,StreamInterface *err){
s.Printf("%s %s\n",ClassName(),Version());
return True;
}
bool ATCAadcDrv::WriteData(uint32 usecTime, const int32 *buffer){
if(buffer == NULL) return False;
const int32 *lBuffer = buffer;
for(int i = 0; i < numberOfBoards; i++){
modules[i].WriteData(lBuffer);
}
return True;
}
int32 ATCAadcDrv::GetData(uint32 usecTime, int32 *buffer, int32 bufferNum){
//Check buffer existence
if(buffer == NULL){
AssertErrorCondition(FatalError,"ATCAadcDrv::GetData: %s. The DDInterface buffer is NULL.",Name());
return -1;
}
int32 *lBuffer = buffer;
for(int i = 0; i < numberOfBoards; i++){
if(!modules[i].GetData(lBuffer)){
AssertErrorCondition(FatalError,"ATCAadcDrv::GetData: %s. Module %d failed acquiring data",Name(),i);
return -1;
}
}
return 1;
}
bool ATCAadcDrv::Poll(){
if(autoSoftwareTrigger){
if(lastCycleUsecTime > autoSoftwareTriggerAfterUs){
SoftwareTrigger();
}
}
bool ok = modules[masterBoardIdx].Poll();
if(!ok){
return ok;
}
// If the module is the timingATMDrv call the Trigger() method of
// the time service object
lastCycleUsecTime = modules[masterBoardIdx].lastCycleUsecTime;
for(int i = 0; i < nOfTriggeringServices; i++){
triggerService[i].Trigger();
}
return ok;
}
bool ATCAadcDrv::ProcessHttpMessage(HttpStream &hStream) {
hStream.SSPrintf("OutputHttpOtions.Content-Type","text/html");
hStream.keepAlive = False;
//copy to the client
hStream.Printf("<html><head><title>%s</title>", Name());
hStream.Printf( "<style type=\"text/css\">\n" );
hStream.Printf("%s\n", css);
hStream.Printf( "</style></head><body>\n" );
hStream.Printf("<table class=\"bltable\">\n");
int i=0;
hStream.Printf("<tr>\n");
for(i=0; i<numberOfBoards; i++){
hStream.Printf("<td>%d</td>\n", modules[i].BoardIdentifier());
}
hStream.Printf("</tr>\n");
hStream.Printf("<tr>\n");
for(i=0; i<numberOfBoards; i++){
hStream.Printf("<td>%s</td>\n", modules[i].isMaster ? "M" : "");
}
hStream.Printf("</tr>\n");
hStream.Printf("<tr>\n");
for(i=0; i<numberOfBoards; i++){
hStream.Printf("<td>%s</td>\n", modules[i].NumberOfOutputChannels() > 0 ? "R" : "");
}
hStream.Printf("</tr>\n");
hStream.Printf("<tr>\n");
hStream.Printf("<form>\n");
for(i=0; i<numberOfBoards; i++){
hStream.Printf("<td><button type=\"submit\" name=\"boardID\" value=\"%d\">.</button></td>\n", modules[i].BoardIdentifier());
}
hStream.Printf("</tr>\n");
hStream.Printf("</form>\n");
hStream.Printf("</table>\n");
hStream.Printf("<form>\n");
hStream.Printf("<td><button type=\"submit\" name=\"reset\" value=\"true\">Reset statistics</button></td>\n");
hStream.Printf("</form>\n");
FString reqBoardID;
reqBoardID.SetSize(0);
if (hStream.Switch("InputCommands.boardID")){
hStream.Seek(0);
hStream.GetToken(reqBoardID, "");
hStream.Switch((uint32)0);
}
FString reqReset;
reqReset.SetSize(0);
if (hStream.Switch("InputCommands.reset")){
hStream.Seek(0);
hStream.GetToken(reqReset, "");
hStream.Switch((uint32)0);
}
if(reqReset.Size() > 0){
for(i=0; i<numberOfBoards; i++){
modules[i].ResetStatistics();
}
}
if(reqBoardID.Size() > 0){
int32 boardID = atoi(reqBoardID.Buffer());
for(i=0; i<numberOfBoards; i++){
if(modules[i].BoardIdentifier() == boardID){
modules[i].ProcessHttpMessage(hStream);
break;
}
}
}
hStream.Printf("<p>Worst polling jitter (us): %f\n", modules[masterBoardIdx].worstPollSleepJitter * 1e6);
hStream.Printf("<p>Last polling sleep time (us): %f", modules[masterBoardIdx].pollSleepTime * 1e6);
hStream.Printf("</body></html>");
hStream.WriteReplyHeader(True);
return True;
}
OBJECTLOADREGISTER(ATCAadcDrv,"$Id: ATCAadcDrv.cpp,v 1.48 2010/02/09 14:50:59 ppcc_dev Exp $")

408
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//******************************************************************************
// MARTe Library
// $Log: ATCAadcDrv.h,v $
// Revision 1.32 2009/12/03 14:52:13 ppcc_dev
// Sleeps, if time is available, before start busy polling.
// The time to sleep is given by the remaining time until the start of
// the next pulse minus the worst jitter from a sleep and minus the
// desired time, before the beginning of the next pulse, that we want to start
// busy polling.
// The worst jitter decays to zero in order to try to maintain a good performance
//
// Revision 1.31 2009/08/07 09:31:47 aneto
// Allow the autoSoftwareTrigger to work even if the softwareTrigger flag
// is set to false
//
// Revision 1.30 2009/05/21 15:18:37 ppcc_dev
// DigIO does not have outputMap
//
// Revision 1.29 2009/04/14 09:06:10 aneto
// Allow the system to auto-trigger after a specified amount of time
//
// Revision 1.28 2009/04/03 10:02:03 aneto
// lastCycleUsecTime now is true 64 bits.
// This uses the information from the headers to increment an internal counter
//
// Revision 1.27 2009/04/01 15:10:36 aneto
// Bug in the way the modulus was being calculated for the usec time. The bug was in converting from 64 to 32 bits of lastCycleUsecTime
//
// Revision 1.26 2009/03/16 11:42:16 aneto
// Corrected the polling mode in order to allow different acquisition frequencies
//
// Revision 1.25 2009/03/11 12:31:54 aneto
// Support an html output with information about the driver
//
// Revision 1.24 2009/01/26 17:26:20 ppcc_dev
// Small bugs solved
//
// Revision 1.23 2009/01/26 09:20:38 aneto
// linux support
//
// Revision 1.22 2008/11/28 12:03:13 aneto
// Added bufferNumber
//
// Revision 1.21 2008/11/21 14:16:52 ppcc_dev
// This version works with the new firmware: jet clock+trigger
//
// Revision 1.19 2008/09/30 11:24:49 rvitelli
// Added non-synchronous operating mode.
//
// Revision 1.18 2008/09/22 17:20:36 fpiccolo
// Solved minor bugs
//
// Revision 1.17 2008/09/15 16:51:45 ppcc_dev
// Solved few bugs
//
// Revision 1.16 2008/09/09 09:29:15 fpiccolo
// Modified driver structure.
// Added SingleATCAModule class
// Added Writing facilities
//
// Revision 1.15 2008/08/20 16:34:36 ppcc_dev
// Added PulseStart to reset the internal counter to 0 when using the SoftTrigger option
//
// Revision 1.14 2008/08/15 10:41:35 fpiccolo
// Minor stylish modifications.
// Added TimeModule Interface
//
// Revision 1.13 2008/08/01 14:09:28 rvitelli
// First working version
//
//******************************************************************************
#ifndef ATCAADCDRV_H_
#define ATCAADCDRV_H_
#include "System.h"
#include "GenericAcqModule.h"
#include "FString.h"
#include "pcieAdc.h"
#include "pcieAdc_ioctl.h"
#ifdef _LINUX
#include <sys/mman.h>
#endif
#include "WebStatisticGAM.h"
class SingleATCAModule{
private:
/** Module Identifier */
int32 moduleIdentifier;
/** Number of Analogue Input channels for this module (Maximum 32)*/
int32 numberOfAnalogueInputChannels;
/** Number of Digital Input channels for this module (1 or 0) */
int32 numberOfDigitalInputChannels;
/** Number of Analogue Output channels (Maximum 8) */
int32 numberOfAnalogueOutputChannels;
/** Number of Digital Output channels () */
int32 numberOfDigitalOutputChannels;
/** Output Map. Used to map the output to a specific physical
output channel. Channels are identified from 1 to 8. */
int32 outputMap[8];
////////////////////////////
// Analogue Input Section //
////////////////////////////
/** If true synchronize on data arrival, if false return latest completed buffer */
bool synchronizing;
/** Pointers to the DMA memory allocated for data acquisition.
The number of buffers is fixed to 4.
*/
int32 *dmaBuffers[DMA_BUFFS];
/** Current DMA buffer index [0-3]. */
static int32 currentDMABufferIndex;
/** The current master header (must be the same in all the boards) */
static int32 currentMasterHeader;
/** Estimated time of the next expected arrival in CPU Ticks of the acquired buffer.
It is computed by adding a delay specified @param periodUsecSleep to
the time of the previous completed acquisition. The system will sleep
till this time elapses.
*/
int64 nextExpectedAcquisitionCPUTicks;
/** Specifies how long to sleep between acquisitions. It is specified in microseconds
but it is internally converted in CPU ticks to avoid unecessary computations during
realtime activities.
*/
int64 boardInternalCycleTicks;
/** Amount of time in microseconds after which the data stops waiting for data arrival
and reports an acquisition error.
*/
int64 dataAcquisitionUsecTimeOut;
/** Length of a "Short Sleep" in seconds. It is used to monitor
the data arrival on the master board and specifies a sleep time
between checks of the data datagram arrival.
*/
float datagramArrivalFastMonitorSecSleep;
/** The number of micro seconds incremented by the board in each cycle. It gives the board acquisition frequency.
*/
int32 boardInternalCycleTime;
/**
* The statistics info for these channels
*/
StatSignalInfo *channelStatistics;
/** Find the currentDMABufferIndex and synchronize on data arrival
*/
int32 CurrentBufferIndex();
/** Find the latest completed buffer without synchronization*/
int32 GetLatestBufferIndex();
public:
SingleATCAModule();
/** Initialises the SingleModule Parameter*/
bool ObjectLoadSetup(ConfigurationDataBase &info,StreamInterface *err = NULL);
/** Reads NumberOfInputChannels() from the DMA Buffer.
The first module must be the master board to assure
correct data transfer.
*/
bool GetData(int32 *&buffer);
bool WriteData(const int32 *&buffer);
/** Copies the pointers to the DMA Buffers */
#ifdef _LINUX
bool InstallDMABuffers(int32 *mappedDmaMemoryLocation);
#else
/** Copies the pointers to the DMA Buffers */
bool InstallDMABuffers();
#endif
/////////////////
// Time Module //
/////////////////
int64 lastCycleUsecTime;
int32 packetCounter;
/** Is Master Board */
bool isMaster;
/** Returns the sum of analogue and digital input channels */
int32 NumberOfInputChannels(){
return numberOfDigitalInputChannels + numberOfAnalogueInputChannels;
}
/** Returns the sum of analogue and digital output channels */
int32 NumberOfOutputChannels(){
return numberOfDigitalOutputChannels + numberOfAnalogueOutputChannels;
}
/** Returns the module Identifier */
int32 BoardIdentifier(){return moduleIdentifier;}
/**
* Output an HTML table with the current value in mV of the acquired signals for this board
*/
virtual bool ProcessHttpMessage(HttpStream &hStream);
/**
* Resets the statistics
*/
bool ResetStatistics();
/**
* Polling method
*/
virtual bool Poll();
/**
* Allow sleeping, when enough time is available, before start polling
*/
bool allowPollSleeping;
/**
* Time to sleep before hard polling: pollSleepTime = CycleTime - time left to cycle time - pollSleepTimeWakeBeforeUs - worstPollSleepJitter;
*/
float pollSleepTime;
/**
* Actually we want to start polling some us before reaching the cycle time
*/
float pollSleepTimeWakeBeforeUs;
/**
* The worst jitter calculated in realtime of the actual time slept before polling and time meant to sleep
*/
float worstPollSleepJitter;
/**
* The worst jitter will try to be recovered with a certain rate
*/
float worstPollSleepJitterDecayRate;
};
OBJECT_DLL(ATCAadcDrv)
/** The high level driver for the ATCA ADC module */
class ATCAadcDrv:public GenericAcqModule{
private:
/** Number of boards in the crate. Read during Initialisation */
int32 numberOfBoards;
/** Pointers to the ATCA modules */
SingleATCAModule *modules;
/** Last cycle usec time */
int64 lastCycleUsecTime;
/** */
bool synchronizing;
/** Software triggered acquisition.
0, which is the default value, means hardware trigger.
*/
int32 softwareTrigger;
/** The master board index
*/
int32 masterBoardIdx;
/** If set to true the a software trigger will be sent every
* AutoSoftwareTriggerAfterUs microseconds. For this to be
* true the value of AutoSoftwareTriggerAfterUs in the configuration file
* must be > 1
*/
bool autoSoftwareTrigger;
int32 autoSoftwareTriggerAfterUs;
#ifdef _LINUX
/** Used only in Linux. The mmapped memory location.*/
int32 *mappedDmaMemoryLocation;
int32 mappedDmaMemorySize;
#endif
/** The css for this page
*/
const char *css;
public:
#ifdef _LINUX
/**The page size*/
static int32 pageSize;
/**The file descriptor to access the driver*/
static int32 fileDescriptor;
#endif
// (De)Constructor
ATCAadcDrv();
virtual ~ATCAadcDrv(){
if(modules != NULL) delete[] modules;
#ifdef _LINUX
munmap(mappedDmaMemoryLocation, mappedDmaMemorySize);
close(fileDescriptor);
#endif
}
// Standard GAM methods
/* Load setup from CDB.
This IOGAM peculiar parameters are PeriodSleep_usec and FastSleep_usec.
@param info: CDB from which load data
@param err: not used
@returns true if all ok*/
virtual bool ObjectLoadSetup(ConfigurationDataBase &info,StreamInterface *err);
/* Print internal GAM informations
@param s: StreamInterface in which print infos
@param full: not used
@param err: not used
@returns true if all ok*/
virtual bool ObjectDescription(StreamInterface &s,bool full = False, StreamInterface *err=NULL);
/* Saves the data into the DDB
@param usecTime: not used
@param buffer: pointer to the data buffer to be filled
@returns 1 if all ok*/
int32 GetData(uint32 usecTime, int32 *buffer, int32 bufferNum = 0);
bool WriteData(uint32 usecTime, const int32 *buffer);
// Set board used as input
virtual bool SetInputBoardInUse(bool on = False){
if(inputBoardInUse && on){
AssertErrorCondition(InitialisationError, "ATCAadcDrv::SetInputBoardInUse: Board %s is already in use", Name());
return False;
}
inputBoardInUse = on;
return True;
}
virtual bool SetOutputBoardInUse(bool on = False){
if(outputBoardInUse && on){
AssertErrorCondition(InitialisationError, "ATCAadcDrv::SetOutputBoardInUse: Board %s is already in use", Name());
return False;
}
outputBoardInUse = on;
return True;
}
virtual bool EnableAcquisition();
virtual bool DisableAcquisition();
//////////////////////
// From Time Module //
//////////////////////
// Get the Time
int64 GetUsecTime(){return lastCycleUsecTime;}
bool SoftwareTrigger(){
if(modules == NULL)return False;
#ifdef _RTAI
SendSoftwareTrigger();
#elif defined(_LINUX)
int ret = ioctl(fileDescriptor, PCIE_ATCA_ADC_IOCT_SEND_SOFT_TRG);
if(ret != 0){
AssertErrorCondition(InitialisationError,"ATCAadcDrv::PulseStart: Could send software trigger. ioctl returned : %d",ret);
return False;
}
#endif
return True;
}
//////////////////////////////////
// Simulation Purpose Functions //
//////////////////////////////////
bool PulseStart(){
if(modules == NULL)return False;
if(softwareTrigger == 1){
return SoftwareTrigger();
}
return True;
}
/**
* Output an HTML page with the current value in mV of the acquired signals
*/
virtual bool ProcessHttpMessage(HttpStream &hStream);
/**
* Polling method
*/
virtual bool Poll();
private:
OBJECT_DLL_STUFF(ATCAadcDrv);
};
#endif /*ATCAADCDRV_H_*/

62
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#*******************************************************************************
# $Log: Makefile.inc,v $
# Revision 1.8 2009/03/11 12:31:54 aneto
# Support an html output with information about the driver
#
# Revision 1.7 2009/03/06 10:01:17 ppcc_dev
# Added automatic compilation
#
# Revision 1.6 2008/09/08 09:18:01 ppcc_dev
# Added a break in the switch sentence of TimeInputGAM.
# Removed the pcieATCA module from standard compilation scripts
#
# Revision 1.5 2008/09/05 11:08:35 ppcc_dev
# Added module compilation
#
# Revision 1.4 2008/08/20 16:34:36 ppcc_dev
# Added PulseStart to reset the internal counter to 0 when using the SoftTrigger option
#
# Revision 1.3 2008/08/01 14:09:56 rvitelli
# *** empty log message ***
#
# Revision 1.2 2008/06/16 14:39:23 rvitelli
# *** empty log message ***
#
# Revision 1.1 2008/06/05 13:18:58 rvitelli
# Skeleton of Drv files and makefiles
#
#
#*******************************************************************************/
OBJSX=
SPB=
CODEDIR=/opt/MARTe
DRIVERDIR=/opt/drivers/ATCA-MIMO
MAKEDEFAULTDIR=$(CODEDIR)/MakeDefaults
include $(MAKEDEFAULTDIR)/MakeStdLibDefs.$(TARGET)
CFLAGS+= -I.
CFLAGS+= -I$(CODEDIR)/GAMs/WebStatisticGAM
CFLAGS+= -I$(CODEDIR)/MARTe/MARTeSupportLib
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level0
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level1
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level2
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level3
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level4
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level5
CFLAGS+= -I$(CODEDIR)/BaseLib2/Level6
CFLAGS+= -I$(CODEDIR)/BaseLib2/LoggerService
CFLAGS+= -I$(DRIVERDIR)/include
all: $(OBJS) $(SUBPROJ) $(TARGET)/ATCAadcDrv$(GAMEXT) \
$(TARGET)/driver_test$(EXEEXT)
echo $(OBJS)
include depends.$(TARGET)
include $(MAKEDEFAULTDIR)/MakeStdLibRules.$(TARGET)

20
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/Makefile.linux Normal file
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#*******************************************************************************
#
# $Log: Makefile.linux,v $
# Revision 1.1 2008/06/05 13:18:58 rvitelli
# Skeleton of Drv files and makefiles
#
#
#*******************************************************************************/
TARGET=linux
include Makefile.inc
LIBRARIES += -L$(CODEDIR)/BaseLib2/$(TARGET) -lBaseLib2
LIBRARIES += -L$(CODEDIR)/MARTe/MARTeSupportLib/$(TARGET) -lMARTeSupLib
LIBRARIES += -lm -ldl -lnsl -lpthread -lrt -lncurses
OPTIM=

19
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/Makefile.msc Normal file
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#*******************************************************************************
#
# $Log: Makefile.msc,v $
# Revision 1.3 2009/05/01 15:08:33 fisa
# do not compile!
#
# Revision 1.2 2008/11/27 15:47:13 lzabeo
# *** empty log message ***
#
# Revision 1.1 2008/08/27 16:32:14 fisa
# *** empty log message ***
#
#*******************************************************************************/
TARGET=msc
all:
clean:

18
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/Makefile.rtai Normal file
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#*******************************************************************************
#
# $Log: Makefile.rtai,v $
# Revision 1.2 2008/08/01 14:10:09 rvitelli
# *** empty log message ***
#
# Revision 1.1 2008/06/05 13:18:58 rvitelli
# Skeleton of Drv files and makefiles
#
#
#*******************************************************************************/
TARGET=rtai
OBJSRTAI=ATCAadcDrv.x driver_test.x
include Makefile.inc

11
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/Makefile.vx5100 Normal file
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@@ -0,0 +1,11 @@
#******************************************************************************
#
# CODASLib library
# $Id: Makefile.vx5100,v 1.1 2009/01/07 13:48:11 aneto Exp $
#
#******************************************************************************
all:
clean:

213
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linux/ATCAadcDrv.o: ATCAadcDrv.cpp ATCAadcDrv.h \
/opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/SystemMSC.h \
/opt/MARTe/BaseLib2/Level0/SystemLinux.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5100.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5500.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5100.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5500.h \
/opt/MARTe/BaseLib2/Level0/SystemVX68k.h \
/opt/MARTe/BaseLib2/Level0/SystemRTAI.h \
/opt/MARTe/BaseLib2/Level0/SystemSolaris.h \
/opt/MARTe/BaseLib2/Level0/SystemMacOSX.h \
/opt/MARTe/BaseLib2/Level0/Memory.h /opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/MARTe/MARTeSupportLib/GenericAcqModule.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level1/GarbageCollectable.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryItem.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructions.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/LinkedListHolder.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/FastPollingMutexSem.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
/opt/MARTe/BaseLib2/Level0/FastMath.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level0/Processor.h \
/opt/MARTe/BaseLib2/Level0/TimeoutType.h \
/opt/MARTe/BaseLib2/Level0/Threads.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/ExceptionHandlerDefinitions.h \
/opt/MARTe/BaseLib2/Level0/ThreadInitialisationInterface.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/MARTe/BaseLib2/Level0/SemCore.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h \
/opt/MARTe/BaseLib2/Level0/ThreadsDatabase.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructionItem.h \
/opt/MARTe/BaseLib2/Level1/ClassStructure.h \
/opt/MARTe/BaseLib2/Level1/ClassStructureEntry.h \
/opt/MARTe/BaseLib2/Level1/BasicTypes.h \
/opt/MARTe/BaseLib2/Level0/BString.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/LoadableLibrary.h \
/opt/MARTe/BaseLib2/Level0/StreamInterface.h \
/opt/MARTe/BaseLib2/Level1/ObjectMacros.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeTriggeringServiceInterface.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level1/GCRCItem.h \
/opt/MARTe/BaseLib2/Level1/GCNOExtender.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeServiceActivity.h \
/opt/MARTe/BaseLib2/Level1/ConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/CDBNull.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level4/HttpInterface.h \
/opt/MARTe/BaseLib2/Level4/HttpRealm.h \
/opt/MARTe/BaseLib2/Level4/HttpDefinitions.h \
/opt/MARTe/BaseLib2/Level2/CDBExtended.h \
/opt/MARTe/BaseLib2/Level2/CDBDataTypes.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level0/CStream.h \
/opt/MARTe/BaseLib2/Level2/CStreamBuffering.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/StreamAttributes.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level4/HttpStream.h \
/opt/MARTe/BaseLib2/Level3/StreamConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc_ioctl.h \
/opt/MARTe/GAMs/WebStatisticGAM/WebStatisticGAM.h \
/opt/MARTe/BaseLib2/Level5/GAM.h /opt/MARTe/BaseLib2/Level3/CDB.h \
/opt/MARTe/BaseLib2/Level3/CDBNodeRef.h \
/opt/MARTe/BaseLib2/Level3/CDBNode.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level5/DDBDefinitions.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuInterface.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level2/Console.h \
/opt/MARTe/BaseLib2/Level0/BasicConsole.h \
/opt/MARTe/BaseLib2/Level5/MessageEnvelope.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level5/Message.h \
/opt/MARTe/BaseLib2/Level5/MessageCode.h \
/opt/MARTe/BaseLib2/Level5/MDRFlags.h \
/opt/MARTe/BaseLib2/Level0/MuxLock.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level5/MessageHandler.h \
/opt/MARTe/BaseLib2/Level5/MessageInterface.h \
/opt/MARTe/BaseLib2/Level5/MessageQueue.h \
/opt/MARTe/BaseLib2/Level2/SXMemory.h /opt/MARTe/BaseLib2/Level0/Sleep.h
linux/driver_test.o: driver_test.cpp /opt/MARTe/BaseLib2/Level2/Console.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/SystemMSC.h \
/opt/MARTe/BaseLib2/Level0/SystemLinux.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5100.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5500.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5100.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5500.h \
/opt/MARTe/BaseLib2/Level0/SystemVX68k.h \
/opt/MARTe/BaseLib2/Level0/SystemRTAI.h \
/opt/MARTe/BaseLib2/Level0/SystemSolaris.h \
/opt/MARTe/BaseLib2/Level0/SystemMacOSX.h \
/opt/MARTe/BaseLib2/Level0/Memory.h /opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/CStream.h \
/opt/MARTe/BaseLib2/Level2/CStreamBuffering.h \
/opt/MARTe/BaseLib2/Level0/StreamInterface.h \
/opt/MARTe/BaseLib2/Level0/TimeoutType.h \
/opt/MARTe/BaseLib2/Level0/HRT.h /opt/MARTe/BaseLib2/Level0/Processor.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryItem.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructions.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/LinkedListHolder.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/FastPollingMutexSem.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
/opt/MARTe/BaseLib2/Level0/FastMath.h \
/opt/MARTe/BaseLib2/Level0/Threads.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/ExceptionHandlerDefinitions.h \
/opt/MARTe/BaseLib2/Level0/ThreadInitialisationInterface.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/MARTe/BaseLib2/Level0/SemCore.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h \
/opt/MARTe/BaseLib2/Level0/ThreadsDatabase.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructionItem.h \
/opt/MARTe/BaseLib2/Level1/ClassStructure.h \
/opt/MARTe/BaseLib2/Level1/ClassStructureEntry.h \
/opt/MARTe/BaseLib2/Level1/BasicTypes.h \
/opt/MARTe/BaseLib2/Level0/BString.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/LoadableLibrary.h \
/opt/MARTe/BaseLib2/Level1/ObjectMacros.h \
/opt/MARTe/BaseLib2/Level1/StreamAttributes.h \
/opt/MARTe/BaseLib2/Level0/BasicConsole.h \
/opt/MARTe/BaseLib2/Level2/FString.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
ATCAadcDrv.h /opt/MARTe/MARTe/MARTeSupportLib/GenericAcqModule.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level1/GarbageCollectable.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeTriggeringServiceInterface.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level1/GCRCItem.h \
/opt/MARTe/BaseLib2/Level1/GCNOExtender.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeServiceActivity.h \
/opt/MARTe/BaseLib2/Level1/ConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/CDBNull.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level4/HttpInterface.h \
/opt/MARTe/BaseLib2/Level4/HttpRealm.h \
/opt/MARTe/BaseLib2/Level4/HttpDefinitions.h \
/opt/MARTe/BaseLib2/Level2/CDBExtended.h \
/opt/MARTe/BaseLib2/Level2/CDBDataTypes.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level4/HttpStream.h \
/opt/MARTe/BaseLib2/Level3/StreamConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc_ioctl.h \
/opt/MARTe/GAMs/WebStatisticGAM/WebStatisticGAM.h \
/opt/MARTe/BaseLib2/Level5/GAM.h /opt/MARTe/BaseLib2/Level3/CDB.h \
/opt/MARTe/BaseLib2/Level3/CDBNodeRef.h \
/opt/MARTe/BaseLib2/Level3/CDBNode.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level5/DDBDefinitions.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuInterface.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level5/MessageEnvelope.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level5/Message.h \
/opt/MARTe/BaseLib2/Level5/MessageCode.h \
/opt/MARTe/BaseLib2/Level5/MDRFlags.h \
/opt/MARTe/BaseLib2/Level0/MuxLock.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level5/MessageHandler.h \
/opt/MARTe/BaseLib2/Level5/MessageInterface.h \
/opt/MARTe/BaseLib2/Level5/MessageQueue.h \
/opt/MARTe/BaseLib2/Level2/SXMemory.h \
/opt/MARTe/BaseLib2/LoggerService/LoggerService.h \
/opt/MARTe/BaseLib2/Level2/File.h /opt/MARTe/BaseLib2/Level0/BasicFile.h \
/opt/MARTe/BaseLib2/Level1/GlobalObjectDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h

213
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ATCAadcDrv.o: ATCAadcDrv.cpp ATCAadcDrv.h \
/opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/SystemMSC.h \
/opt/MARTe/BaseLib2/Level0/SystemLinux.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5100.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5500.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5100.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5500.h \
/opt/MARTe/BaseLib2/Level0/SystemVX68k.h \
/opt/MARTe/BaseLib2/Level0/SystemRTAI.h \
/opt/MARTe/BaseLib2/Level0/SystemSolaris.h \
/opt/MARTe/BaseLib2/Level0/SystemMacOSX.h \
/opt/MARTe/BaseLib2/Level0/Memory.h /opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/MARTe/MARTeSupportLib/GenericAcqModule.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level1/GarbageCollectable.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryItem.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructions.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/LinkedListHolder.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/FastPollingMutexSem.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
/opt/MARTe/BaseLib2/Level0/FastMath.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level0/Processor.h \
/opt/MARTe/BaseLib2/Level0/TimeoutType.h \
/opt/MARTe/BaseLib2/Level0/Threads.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/ExceptionHandlerDefinitions.h \
/opt/MARTe/BaseLib2/Level0/ThreadInitialisationInterface.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/MARTe/BaseLib2/Level0/SemCore.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h \
/opt/MARTe/BaseLib2/Level0/ThreadsDatabase.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructionItem.h \
/opt/MARTe/BaseLib2/Level1/ClassStructure.h \
/opt/MARTe/BaseLib2/Level1/ClassStructureEntry.h \
/opt/MARTe/BaseLib2/Level1/BasicTypes.h \
/opt/MARTe/BaseLib2/Level0/BString.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/LoadableLibrary.h \
/opt/MARTe/BaseLib2/Level0/StreamInterface.h \
/opt/MARTe/BaseLib2/Level1/ObjectMacros.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeTriggeringServiceInterface.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level1/GCRCItem.h \
/opt/MARTe/BaseLib2/Level1/GCNOExtender.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeServiceActivity.h \
/opt/MARTe/BaseLib2/Level1/ConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/CDBNull.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level4/HttpInterface.h \
/opt/MARTe/BaseLib2/Level4/HttpRealm.h \
/opt/MARTe/BaseLib2/Level4/HttpDefinitions.h \
/opt/MARTe/BaseLib2/Level2/CDBExtended.h \
/opt/MARTe/BaseLib2/Level2/CDBDataTypes.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level0/CStream.h \
/opt/MARTe/BaseLib2/Level2/CStreamBuffering.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/StreamAttributes.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level4/HttpStream.h \
/opt/MARTe/BaseLib2/Level3/StreamConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc_ioctl.h \
/opt/MARTe/GAMs/WebStatisticGAM/WebStatisticGAM.h \
/opt/MARTe/BaseLib2/Level5/GAM.h /opt/MARTe/BaseLib2/Level3/CDB.h \
/opt/MARTe/BaseLib2/Level3/CDBNodeRef.h \
/opt/MARTe/BaseLib2/Level3/CDBNode.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level5/DDBDefinitions.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuInterface.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level2/Console.h \
/opt/MARTe/BaseLib2/Level0/BasicConsole.h \
/opt/MARTe/BaseLib2/Level5/MessageEnvelope.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level5/Message.h \
/opt/MARTe/BaseLib2/Level5/MessageCode.h \
/opt/MARTe/BaseLib2/Level5/MDRFlags.h \
/opt/MARTe/BaseLib2/Level0/MuxLock.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level5/MessageHandler.h \
/opt/MARTe/BaseLib2/Level5/MessageInterface.h \
/opt/MARTe/BaseLib2/Level5/MessageQueue.h \
/opt/MARTe/BaseLib2/Level2/SXMemory.h /opt/MARTe/BaseLib2/Level0/Sleep.h
driver_test.o: driver_test.cpp /opt/MARTe/BaseLib2/Level2/Console.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/SystemMSC.h \
/opt/MARTe/BaseLib2/Level0/SystemLinux.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5100.h \
/opt/MARTe/BaseLib2/Level0/SystemVX5500.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5100.h \
/opt/MARTe/BaseLib2/Level0/SystemV6X5500.h \
/opt/MARTe/BaseLib2/Level0/SystemVX68k.h \
/opt/MARTe/BaseLib2/Level0/SystemRTAI.h \
/opt/MARTe/BaseLib2/Level0/SystemSolaris.h \
/opt/MARTe/BaseLib2/Level0/SystemMacOSX.h \
/opt/MARTe/BaseLib2/Level0/Memory.h /opt/MARTe/BaseLib2/Level0/System.h \
/opt/MARTe/BaseLib2/Level0/CStream.h \
/opt/MARTe/BaseLib2/Level2/CStreamBuffering.h \
/opt/MARTe/BaseLib2/Level0/StreamInterface.h \
/opt/MARTe/BaseLib2/Level0/TimeoutType.h \
/opt/MARTe/BaseLib2/Level0/HRT.h /opt/MARTe/BaseLib2/Level0/Processor.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryItem.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructions.h \
/opt/MARTe/BaseLib2/Level0/GenDefs.h \
/opt/MARTe/BaseLib2/Level0/LinkedListHolder.h \
/opt/MARTe/BaseLib2/Level0/LinkedListable.h \
/opt/MARTe/BaseLib2/Level0/FastPollingMutexSem.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
/opt/MARTe/BaseLib2/Level0/FastMath.h \
/opt/MARTe/BaseLib2/Level0/Threads.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/ExceptionHandlerDefinitions.h \
/opt/MARTe/BaseLib2/Level0/ThreadInitialisationInterface.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/MARTe/BaseLib2/Level0/SemCore.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h \
/opt/MARTe/BaseLib2/Level0/ThreadsDatabase.h \
/opt/MARTe/BaseLib2/Level1/ErrorSystemInstructionItem.h \
/opt/MARTe/BaseLib2/Level1/ClassStructure.h \
/opt/MARTe/BaseLib2/Level1/ClassStructureEntry.h \
/opt/MARTe/BaseLib2/Level1/BasicTypes.h \
/opt/MARTe/BaseLib2/Level0/BString.h \
/opt/MARTe/BaseLib2/Level0/ErrorManagement.h \
/opt/MARTe/BaseLib2/Level0/LoadableLibrary.h \
/opt/MARTe/BaseLib2/Level1/ObjectMacros.h \
/opt/MARTe/BaseLib2/Level1/StreamAttributes.h \
/opt/MARTe/BaseLib2/Level0/BasicConsole.h \
/opt/MARTe/BaseLib2/Level2/FString.h /opt/MARTe/BaseLib2/Level0/Sleep.h \
ATCAadcDrv.h /opt/MARTe/MARTe/MARTeSupportLib/GenericAcqModule.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level1/GarbageCollectable.h \
/opt/MARTe/BaseLib2/Level1/Object.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeTriggeringServiceInterface.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level0/Atomic.h \
/opt/MARTe/BaseLib2/Level1/ObjectRegistryDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level1/GCRTemplate.h \
/opt/MARTe/BaseLib2/Level1/GCNamedObject.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level1/GCRCItem.h \
/opt/MARTe/BaseLib2/Level1/GCNOExtender.h \
/opt/MARTe/MARTe/MARTeSupportLib/TimeServiceActivity.h \
/opt/MARTe/BaseLib2/Level1/ConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level0/Iterators.h \
/opt/MARTe/BaseLib2/Level1/CDBNull.h /opt/MARTe/BaseLib2/Level0/HRT.h \
/opt/MARTe/BaseLib2/Level4/HttpInterface.h \
/opt/MARTe/BaseLib2/Level4/HttpRealm.h \
/opt/MARTe/BaseLib2/Level4/HttpDefinitions.h \
/opt/MARTe/BaseLib2/Level2/CDBExtended.h \
/opt/MARTe/BaseLib2/Level2/CDBDataTypes.h \
/opt/MARTe/BaseLib2/Level1/CDBTypes.h \
/opt/MARTe/BaseLib2/Level4/HttpStream.h \
/opt/MARTe/BaseLib2/Level3/StreamConfigurationDataBase.h \
/opt/MARTe/BaseLib2/Level2/FString.h \
/opt/MARTe/BaseLib2/Level0/EventSem.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc.h \
/opt/drivers/ATCA-MIMO/include/pcieAdc_ioctl.h \
/opt/MARTe/GAMs/WebStatisticGAM/WebStatisticGAM.h \
/opt/MARTe/BaseLib2/Level5/GAM.h /opt/MARTe/BaseLib2/Level3/CDB.h \
/opt/MARTe/BaseLib2/Level3/CDBNodeRef.h \
/opt/MARTe/BaseLib2/Level3/CDBNode.h \
/opt/MARTe/BaseLib2/Level1/CDBVirtual.h \
/opt/MARTe/BaseLib2/Level5/DDBDefinitions.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuInterface.h \
/opt/MARTe/BaseLib2/Level2/Streamable.h \
/opt/MARTe/BaseLib2/Level5/MessageEnvelope.h \
/opt/MARTe/BaseLib2/Level1/GCReference.h \
/opt/MARTe/BaseLib2/Level5/Message.h \
/opt/MARTe/BaseLib2/Level5/MessageCode.h \
/opt/MARTe/BaseLib2/Level5/MDRFlags.h \
/opt/MARTe/BaseLib2/Level0/MuxLock.h \
/opt/MARTe/BaseLib2/Level0/MutexSem.h \
/opt/MARTe/BaseLib2/Level5/MessageHandler.h \
/opt/MARTe/BaseLib2/Level5/MessageInterface.h \
/opt/MARTe/BaseLib2/Level5/MessageQueue.h \
/opt/MARTe/BaseLib2/Level2/SXMemory.h \
/opt/MARTe/BaseLib2/LoggerService/LoggerService.h \
/opt/MARTe/BaseLib2/Level2/File.h /opt/MARTe/BaseLib2/Level0/BasicFile.h \
/opt/MARTe/BaseLib2/Level1/GlobalObjectDataBase.h \
/opt/MARTe/BaseLib2/Level1/GCReferenceContainer.h \
/opt/MARTe/BaseLib2/Level5/MenuContainer.h \
/opt/MARTe/BaseLib2/Level0/ProcessorType.h

267
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/driver_test.cpp Normal file
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//******************************************************************************
// MARTe Library
// $Log: driver_test.cpp,v $
// Revision 1.17 2009/03/31 08:11:37 aneto
// Support for multiple input
//
// Revision 1.16 2009/01/26 09:20:38 aneto
// linux support
//
// Revision 1.15 2008/08/01 16:29:13 rvitelli
// trigger
//
// Revision 1.14 2008/08/01 14:09:26 rvitelli
// First working version
//
// Revision 1.13 2008/06/19 10:15:46 rvitelli
// Lowered sleep between GetData calls to allow execution of LongSleeps. Probably a problem due to execution of mod_writer and driver_test on the same processor.
//
// Revision 1.12 2008/06/19 07:22:49 rvitelli
// Added std_dev
//
// Revision 1.11 2008/06/18 17:19:04 rvitelli
// Optimization.
//
// Revision 1.10 2008/06/18 17:06:36 rvitelli
// Added variance statistic.
//
// Revision 1.9 2008/06/18 16:49:21 rvitelli
// Minor bug.
//******************************************************************************
#include "Console.h"
#include "Sleep.h"
#include "ATCAadcDrv.h"
#include "Threads.h"
#include "LoggerService.h"
#include "File.h"
#include "SXMemory.h"
#include "ConfigurationDataBase.h"
#include "GCReferenceContainer.h"
#include "GlobalObjectDataBase.h"
#include "MenuContainer.h"
#include "ProcessorType.h"
const char *cdbMap=
"+ATCA_DRIVER={\n"
" Class = ATCAadcDrv\n"
" Title = \"ATCA Driver test\" \n"
" SoftTrigger=1\n"
" NumberOfOutputs=8\n"
" NumberOfInputs=64\n"
" ExtTriggerAndClock=1\n"
"}\n"
"+MENUS={"
" Class = MenuContainer\n"
" Title = \"ATCA ADC Driver Test\" \n"
" +START_ACK_MENU={\n"
" Class = MenuEntry\n"
" Title = \"Start Acquisition\"\n"
" }\n"
" +STOP_ACK_MENU={\n"
" Class = MenuEntry\n"
" Title = \"Stop Acquisition\"\n"
" }\n"
" +SAVE_DATA_MENU={\n"
" Class = MenuEntry\n"
" Title = \"Save acquired data\"\n"
" }\n"
" +PRINT_DATA_MENU={\n"
" Class = MenuEntry\n"
" Title = \"Print last buffer\"\n"
" }\n"
"}";
volatile int keepAlive = 0;
int64 max_timer = 0;
float mean_exec_time = 0;
float meansquare_exec_time = 0;
float variance_exec_time = 0;
const int32 BUFFER_BOARD_TRF_SIZE = 33 + 2 * HEADER_LENGTH;
const int32 MAX_SAMPLES_TO_SAVE = 100;
int32 buffer[70];
uint32 outputBuffer[3];
uint32 dataBrd1[BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE];
int32 dataBrd2[BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE];
int32 printLastBuffer = 0;
GCRTemplate<GenericAcqModule> driver;
void __thread_decl acquisitionThread(void *ptr){
int k = 0;
int64 timer = 0;
int64 timer_after = 0;
int ret = 0;
max_timer = 0;
mean_exec_time = 0;
meansquare_exec_time = 0;
variance_exec_time = 0;
driver->EnableAcquisition();
int triggerReceived = 0;
memset(buffer, 0, BUFFER_BOARD_TRF_SIZE * sizeof(int32));
memset(dataBrd1, 0, BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE * sizeof(int32));
memset(dataBrd2, 0, BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE * sizeof(int32));
//Console con;
printf("Starting\n");
while (keepAlive != 0){
timer = HRT::HRTCounter();
SleepSec(10E-6);
ret = driver->GetData(0, buffer);
printf("Time: [%d], k = %d, BUFFER_BOARD_TRF_SIZE = %d!\n", dataBrd1[0], k, BUFFER_BOARD_TRF_SIZE);
printf("Time End = %d, Status = %d\n", dataBrd1[BUFFER_BOARD_TRF_SIZE - 1], dataBrd1[BUFFER_BOARD_TRF_SIZE - 2]);
if(dataBrd1[0] == 0 && k > 5){
triggerReceived = 1;
k = 0;
max_timer = 0;
mean_exec_time = 0;
meansquare_exec_time = 0;
variance_exec_time = 0;
printf("Trigger received!\n");
}
if(printLastBuffer > 0){
printf("H[%d] = %d F[%d] = %d\n", k, 0, k, dataBrd1[BUFFER_BOARD_TRF_SIZE - 1]);
printLastBuffer = 0;
}
if(triggerReceived == 1 && k < MAX_SAMPLES_TO_SAVE){
for(int j=0; j<BUFFER_BOARD_TRF_SIZE; j++){
dataBrd1[BUFFER_BOARD_TRF_SIZE * k + j] = buffer[j];
dataBrd2[BUFFER_BOARD_TRF_SIZE * k + j] = buffer[BUFFER_BOARD_TRF_SIZE + j];
}
//dataBrd1[BUFFER_BOARD_TRF_SIZE * k] = ret * HRT::HRT::HRTPeriod() * 1000000;//buffer[0];
}
outputBuffer[0] = 0;
outputBuffer[1] = 7;
outputBuffer[2] += 10;
driver->WriteData(0, (int32 *)outputBuffer);
timer_after = HRT::HRTCounter();
if ( (timer_after - timer) > max_timer) {
max_timer = timer_after - timer;
}
mean_exec_time += (float)(timer_after - timer);
meansquare_exec_time += (float)((timer_after - timer)*(timer_after - timer));
k++;
}
driver->DisableAcquisition();
mean_exec_time /= k;
variance_exec_time = ( (meansquare_exec_time - max_timer*max_timer)/k - mean_exec_time*mean_exec_time);
keepAlive = 1;
}
bool StartAcquisition(StreamInterface &in,StreamInterface &out,void *userData){
if(keepAlive != 0){
out.Printf("Acquisition already started\n");
return False;
}
keepAlive = 1;
ProcessorType runCore(0x8);
Threads::BeginThread(acquisitionThread, NULL, THREADS_DEFAULT_STACKSIZE, NULL, XH_NotHandled, runCore);
return True;
}
bool StopAcquisition(StreamInterface &in,StreamInterface &out,void *userData){
if(keepAlive == 0){
out.Printf("Acquisition already stopped\n");
return False;
}
out.Printf("Stopping acquisition\n");
keepAlive = 0;
while(keepAlive != 1){
SleepSec(1.0);
}
keepAlive = 0;
out.Printf("Acquisition stopped\n");
out.Printf("\nmax_timer = %f\n", max_timer*HRT::HRTPeriod()*1000000);
out.Printf("mean_exec_time = %f\n", mean_exec_time*HRT::HRTPeriod()*1000000);
out.Printf("dev_std_exec_time = %f\n", sqrt(variance_exec_time)*HRT::HRTPeriod()*1000000);
out.Printf("max_error = %f\n", (max_timer-mean_exec_time)*HRT::HRTPeriod()*1000000);
}
bool SaveData(StreamInterface &in,StreamInterface &out,void *userData){
out.Printf("Saving Data\n");
File outputFile;
FString dataDump;
FString filename;
FString dataDump2;
dataDump.SetSize(BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE);
dataDump2.SetSize(BUFFER_BOARD_TRF_SIZE * MAX_SAMPLES_TO_SAVE);
out.Printf("Printing in FString\n");
for(int k=0; k<MAX_SAMPLES_TO_SAVE; k++){
for(int j=0; j<BUFFER_BOARD_TRF_SIZE; j++){
dataDump.Printf("%d ", dataBrd1[BUFFER_BOARD_TRF_SIZE * k + j]);
dataDump2.Printf("%d ", dataBrd2[BUFFER_BOARD_TRF_SIZE * k + j]);
}
dataDump.Printf("\n");
dataDump2.Printf("\n");
}
out.Printf("Printing in File\n");
filename.Printf("data_%d.dump", time(NULL));
outputFile.OpenNew(filename.Buffer());
outputFile.Printf("%s", dataDump.Buffer());
outputFile.Close();
out.Printf("Data for board 1 saved at %s\n", filename.Buffer());
filename.SetSize(0);
filename.Printf("data2_%d.dump", time(NULL));
outputFile.OpenNew(filename.Buffer());
outputFile.Printf("%s", dataDump2.Buffer());
outputFile.Close();
out.Printf("Data for board 2 saved at %s\n", filename.Buffer());
}
bool PrintLastBuffer(StreamInterface &in,StreamInterface &out,void *userData){
printLastBuffer = 1;
}
int main(int argc, char **argv) {
LSSetUserAssembleErrorMessageFunction(LSAssembleErrorMessage);
LSSetRemoteLogger("localhost",32767);
LSStartService();
SXMemory config((char *)cdbMap,strlen(cdbMap));
ConfigurationDataBase cdb;
if (!cdb->ReadFromStream(config,NULL)){
CStaticAssertErrorCondition(ParametersError,"Init: cdb.ReadFromStream failed");
return -1;
}
GCRTemplate<GCReferenceContainer> godb = GetGlobalObjectDataBase();
godb->ObjectLoadSetup(cdb,NULL);
GCRTemplate<MenuContainer> mc;
mc = godb->Find("MENUS");
if (!mc.IsValid()){
CStaticAssertErrorCondition(FatalError,"cannot find MENUS MenuContainer object\n");
return -2;
}
driver = godb->Find("ATCA_DRIVER");
if (!driver.IsValid()){
CStaticAssertErrorCondition(FatalError,"cannot find ATCA_DRIVER MenuContainer object\n");
return -2;
}
Console con(PerformCharacterInput);
con.SetPaging(True);
mc->SetupItem("START_ACK_MENU", StartAcquisition, NULL, NULL, NULL);
mc->SetupItem("STOP_ACK_MENU", StopAcquisition, NULL, NULL, NULL);
mc->SetupItem("SAVE_DATA_MENU", SaveData, NULL, NULL, NULL);
mc->SetupItem("PRINT_LAST_BUFFER", PrintLastBuffer, NULL, NULL, NULL);
mc->TextMenu(con,con);
// LSStopService();
return 0;
}

78
epics/css/sys-mng-opi/CSS/MARTe/IOGAMs/ATCAadc/driver_test.sh Normal file
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#############################################################
#
# Copyright 2011 EFDA | European Fusion Development Agreement
#
# Licensed under the EUPL, Version 1.1 or - as soon they
# will be approved by the European Commission - subsequent
# versions of the EUPL (the "Licence");
# You may not use this work except in compliance with the
# Licence.
# You may obtain a copy of the Licence at:
#
# http://ec.europa.eu/idabc/eupl
#
# Unless required by applicable law or agreed to in
# writing, software distributed under the Licence is
# distributed on an "AS IS" basis,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
# express or implied.
# See the Licence for the specific language governing
# permissions and limitations under the Licence.
#
# $Id$
#
#############################################################
#Start-up script for the MARTe
#!/bin/sh
target=`uname`
case ${target} in
Darwin)
TARGET=macosx
;;
SunOS)
TARGET=solaris
;;
*)
TARGET=linux
;;
esac
echo "Target is $TARGET"
BASEDIR=/opt/MARTe
CODE_DIRECTORY=$BASEDIR
LD_LIBRARY_PATH=.:$CODE_DIRECTORY/BaseLib2/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/MARTe/MARTeSupportLib/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/IOGAMs/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/IOGAMs/LinuxTimer/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/IOGAMs/GenericTimerDriver/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/IOGAMs/StreamingDriver/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/PIDGAM/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/WaterTank/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/WaveformGenerator2009/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/WebStatisticGAM/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/DataCollectionGAM/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/EPICSGAM/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/GAMs/PlottingGAM/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/Interfaces/HTTP/CFGUploader/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/Interfaces/HTTP/SignalHandler/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/Interfaces/HTTP/MATLABHandler/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:$CODE_DIRECTORY/Interfaces/HTTP/FlotPlot/${TARGET}/
LD_LIBRARY_PATH=$LD_LIBRARY_PATH:./${TARGET}/
if [ ${TARGET} == "macosx" ]; then
export DYLD_LIBRARY_PATH=$DYLD_LIBRARY_PATH:$LD_LIBRARY_PATH
echo $DYLD_LIBRARY_PATH
else
export LD_LIBRARY_PATH=$LD_LIBRARY_PATH
echo $LD_LIBRARY_PATH
fi
./${TARGET}/driver_test.ex