Added PVs for PCF8591 ADDA chip interface

epics/iocs/ISTTOKrpi/ISTTOKrpiApp/Db/ISTTOKpcf8591.db

@@ -0,0 +1,35 @@
+#######################################################
+# ###                                             ### #
+# ### EPICS Database for                          ### #
+# ### I2C PCF8591 board                           ### #
+# ###                                             ### #
+# ### author: B. Carvalho IPFN                    ### #
+# ###                                             ### #
+# ### Ref 2.0; 2019-10-14                         ### #
+# ###                                             ### #
+# ### macros: ID      I2C address of ADC          ### #
+# ### Description:                                ### #
+# ### This is an example DB file using            ### #
+# ### stream(asynI2C)    to read/write   ### #
+# ### an PCF8591 ADDA chip                        ### #
+#######################################################
+
+#####################################################
+# Read/Write pcf8591 register @ address 0x48=d72 ### #
+#####################################################
+record( mbboDirect, "$(P)$(R)PCF8591:72:CTRLREGISTER") {
+	field( DTYP, "stream")
+	field( OUT,  "@pcf8591.proto wReg(72) I2C")
+	field( SHFT, "0")
+	field( NOBT, "8")
+	field(VAL, 255)
+	field(PINI,"YES")
+}
+
+record( longin, "$(P)$(R)PCF8591:72:ADC_CH0" ) {
+	field(DTYP, "stream")
+	field(INP,  "@pcf8591.proto rConvAdc0(72) I2C")
+	field(SCAN, "1 second")
+#field( FLNK, "
+}
+

epics/iocs/ISTTOKrpi/protocols/pcf8591.proto

@@ -0,0 +1,44 @@
+Terminator   = "";
+LockTimeout  = 500;
+ReplyTimeout = 100;
+ReadTimeout  = 100;
+WriteTimeout = 100;
+MaxInput     = 1;
+ExtraInput   = Error;
+
+rReg {
+  out ${1};
+  in  "%.1r";
+}
+# To read adc write control Byte
+# Bits 0,1 ADC channel Selection
+# Bits 2 : ADC auto increment =0
+# Bits 3 : =0
+# Bits 4,5 ADC configuration . 00 = four single ended channels
+# Bits 6 : DAC Output enable bit
+# Bits 7 : =0
+
+rConvAdc0 {
+  out ${1} 0x00;
+  in  "%01r";
+}
+rConvAdc1 {
+  out ${1} 0x01;
+  in  "%01r";
+}
+rConvAdc2 {
+  out ${1} 0x02;
+  in  "%01r";
+}
+rConvAdc3 {
+  out ${1} 0x03;
+  in  "%01r";
+}
+
+##  @init { rReg; }
+##
+wReg {
+  out ${1} "%.1r";
+}
+
+